Now blackfin simulation only supports interpret-execution. We will add binary translation to speed up its execution in the future. You can spilt blackfin simulation module to two parts. The first part simulation the processor core and exists in arch/bfin/common directory, it simlates instruction-fetch, instruction-decode and instruction-excution. And all the instruction is exeucted step by step under interpret-execution way. The main excution cycle is in [ arch/bfin/common/bfin_arch_interface.c: bfin_step_once] .
The second part contain interrupt simulation and peripheral simuation and exists in arch/bfin/mach/ directory . It provides a bf533_io_do_cycle function for interrupt and exception detection.
Now only blackfin 533 processor is supported. Some features such as cache, cplb is not simulated until now.